Hardware - probabilistic computing

If one accepts that vision algorithms can gain in efficiency by using only part of the information in an image, one can extend this reasoning to the hardware involved in the calculations to save even more time and energy. On a typical processor, considerable amounts of energy are spent on obtaining correct calculation results, e.g. for adding or multiplying numbers. In probabilistic computing [1, 2, 3], the energy spent by the processing units is lowered, resulting in an increase of the probability that some operations might go wrong. Fortunately, it has been shown that the amount of energy saved is significantly larger than the amount of probability traded in [1] - see the figure below. As a consequence, in theory, large energy gains (in the order of 5 times) can be obtained at a minimal cost in calculation errors.

Different applications of probabilistic computing have been investigated. The study in [1] focused on the application of probabilistic computing to the calculation of the Fourier transform, showing that for human subjects the probabilistic reconstruction is visually identical to the error-free one. Another study involved the application of probabilistic computing to Continuous Restricted Boltzmann Machines (CBRM) [2]. Such CBRMs normally require the generation of pseudo-random numbers. Instead, in [2] probabilistic computing naturally provided random numbers.

This study proposes to perform research on probabilistic computing in a different context, namely that of a vision algorithm for robotics. The main idea behind the application is that a slight loss in accuracy in the computations of the vision algorithms can still lead to robust and successful retrieval of information on the environment.

References

1. George, Jason, Bo Marr, Bilge ES Akgul, and Krishna V Palem. 2006. “Probabilistic Arithmetic and Energy Efficient Embedded Signal Processing.” In Proceedings of the 2006 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, 158–68 ACM
2. Hamid, Nor Hisham, Alan F Murray, David Laurenson, Scott Roy, and Binjie Cheng. 2005. “Probabilistic Computing with Future Deep Sub-Micrometer Devices: a Modelling Approach.” In Circuits and Systems, 2005. ISCAS 2005. IEEE International Symposium On, 2510–13 IEEE
3. Marr, Bo, Jason George, Brian Degnan, David V Anderson, and Paul Hasler. 2010. “Error Immune Logic for Low-Power Probabilistic Computing.” VLSI Design 2010: 6